JPH0478015B2 - - Google Patents

Info

Publication number
JPH0478015B2
JPH0478015B2 JP59096535A JP9653584A JPH0478015B2 JP H0478015 B2 JPH0478015 B2 JP H0478015B2 JP 59096535 A JP59096535 A JP 59096535A JP 9653584 A JP9653584 A JP 9653584A JP H0478015 B2 JPH0478015 B2 JP H0478015B2
Authority
JP
Japan
Prior art keywords
hole
pin
substrate
semiconductor device
solder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59096535A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60241244A (ja
Inventor
Takayuki Okinaga
Hiroshi Tate
Hiroshi Ozaki
Kanji Ootsuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Microcomputer System Ltd
Hitachi Ltd
Original Assignee
Hitachi Microcomputer System Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Microcomputer System Ltd, Hitachi Ltd filed Critical Hitachi Microcomputer System Ltd
Priority to JP59096535A priority Critical patent/JPS60241244A/ja
Publication of JPS60241244A publication Critical patent/JPS60241244A/ja
Publication of JPH0478015B2 publication Critical patent/JPH0478015B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP59096535A 1984-05-16 1984-05-16 ピングリッドアレイ型半導体装置の製造方法 Granted JPS60241244A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59096535A JPS60241244A (ja) 1984-05-16 1984-05-16 ピングリッドアレイ型半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59096535A JPS60241244A (ja) 1984-05-16 1984-05-16 ピングリッドアレイ型半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS60241244A JPS60241244A (ja) 1985-11-30
JPH0478015B2 true JPH0478015B2 (en]) 1992-12-10

Family

ID=14167813

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59096535A Granted JPS60241244A (ja) 1984-05-16 1984-05-16 ピングリッドアレイ型半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS60241244A (en])

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6292352A (ja) * 1985-10-17 1987-04-27 Tanaka Denshi Kogyo Kk チツプオンボ−ドのリ−ドピン
JPH0777253B2 (ja) * 1986-03-20 1995-08-16 イビデン株式会社 半導体搭載用基板
JPH0766953B2 (ja) * 1986-09-11 1995-07-19 イビデン株式会社 半導体搭載用基板
JPH0815199B2 (ja) * 1986-12-22 1996-02-14 イビデン株式会社 半導体搭載用基板の製造方法およびそれに用いられる治具板
JPH01117084A (ja) * 1987-10-29 1989-05-09 Nec Corp プラスチックピングリッドアレイパッケージ
US5036431A (en) * 1988-03-03 1991-07-30 Ibiden Co., Ltd. Package for surface mounted components
US5592025A (en) * 1992-08-06 1997-01-07 Motorola, Inc. Pad array semiconductor device
KR20030004644A (ko) * 2001-07-06 2003-01-15 홍성결 피지에이 패키지용 압착 리드핀

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS48101878A (en]) * 1972-04-03 1973-12-21
JPS509759U (en]) * 1973-05-24 1975-01-31
US3890328A (en) * 1974-03-08 1975-06-17 Richardson Merrell Inc N,N-dioxides of bis-basic cyclic ketones
JPS5256366A (en) * 1975-11-04 1977-05-09 Sony Corp Method of conducting bothhside printed substrate
JPS5810848A (ja) * 1981-07-14 1983-01-21 Toshiba Corp 混成集積回路用リ−ドピン
JPS58159355A (ja) * 1982-03-17 1983-09-21 Nec Corp 半導体装置の製造方法
JPS5982757A (ja) * 1982-11-04 1984-05-12 Toshiba Corp 半導体用ステムおよびその製造方法

Also Published As

Publication number Publication date
JPS60241244A (ja) 1985-11-30

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